// SPDX-License-Identifier: GPL-2.0-only

#include <mach/arria10-pinmux.h>

static uint32_t pinmux[] = {
[arria10_pinmux_shared_io_q4_12] = 8,
[arria10_pinmux_shared_io_q4_11] = 8,
[arria10_pinmux_shared_io_q4_10] = 8,
[arria10_pinmux_shared_io_q4_9] = 8,
[arria10_pinmux_shared_io_q4_8] = 8,
[arria10_pinmux_shared_io_q4_6] = 8,
[arria10_pinmux_shared_io_q4_7] = 8,
[arria10_pinmux_shared_io_q4_5] = 8,
[arria10_pinmux_shared_io_q4_4] = 8,
[arria10_pinmux_shared_io_q4_3] = 8,
[arria10_pinmux_shared_io_q4_2] = 8,
[arria10_pinmux_shared_io_q4_1] = 8,
[arria10_pinmux_shared_io_q3_12] = 8,
[arria10_pinmux_shared_io_q3_11] = 8,
[arria10_pinmux_shared_io_q3_10] = 8,
[arria10_pinmux_shared_io_q3_8] = 8,
[arria10_pinmux_shared_io_q3_9] = 8,
[arria10_pinmux_shared_io_q3_7] = 8,
[arria10_pinmux_shared_io_q3_6] = 8,
[arria10_pinmux_shared_io_q3_5] = 8,
[arria10_pinmux_shared_io_q3_4] = 8,
[arria10_pinmux_shared_io_q3_3] = 8,
[arria10_pinmux_shared_io_q3_2] = 8,
[arria10_pinmux_shared_io_q3_1] = 8,
[arria10_pinmux_shared_io_q2_12] = 8,
[arria10_pinmux_shared_io_q2_10] = 8,
[arria10_pinmux_shared_io_q2_11] = 8,
[arria10_pinmux_shared_io_q2_9] = 8,
[arria10_pinmux_shared_io_q2_8] = 8,
[arria10_pinmux_shared_io_q2_7] = 8,
[arria10_pinmux_shared_io_q2_6] = 8,
[arria10_pinmux_shared_io_q2_5] = 8,
[arria10_pinmux_shared_io_q2_4] = 8,
[arria10_pinmux_shared_io_q2_3] = 8,
[arria10_pinmux_shared_io_q2_2] = 8,
[arria10_pinmux_shared_io_q2_1] = 8,
[arria10_pinmux_shared_io_q1_12] = 10,
[arria10_pinmux_shared_io_q1_11] = 10,
[arria10_pinmux_shared_io_q1_10] = 1,
[arria10_pinmux_shared_io_q1_9] = 1,
[arria10_pinmux_shared_io_q1_8] = 1,
[arria10_pinmux_shared_io_q1_7] = 1,
[arria10_pinmux_shared_io_q1_6] = 0,
[arria10_pinmux_shared_io_q1_5] = 0,
[arria10_pinmux_shared_io_q1_4] = 13,
[arria10_pinmux_shared_io_q1_3] = 13,
[arria10_pinmux_shared_io_q1_2] = 13,
[arria10_pinmux_shared_io_q1_1] = 13,
[arria10_pinmux_dedicated_io_4] = 8,
[arria10_pinmux_dedicated_io_5] = 8,
[arria10_pinmux_dedicated_io_6] = 8,
[arria10_pinmux_dedicated_io_7] = 8,
[arria10_pinmux_dedicated_io_8] = 8,
[arria10_pinmux_dedicated_io_9] = 8,
[arria10_pinmux_dedicated_io_10] = 10,
[arria10_pinmux_dedicated_io_11] = 10,
[arria10_pinmux_dedicated_io_12] = 8,
[arria10_pinmux_dedicated_io_13] = 8,
[arria10_pinmux_dedicated_io_14] = 8,
[arria10_pinmux_dedicated_io_15] = 8,
[arria10_pinmux_dedicated_io_16] = 15,
[arria10_pinmux_dedicated_io_17] = 15,
[arria10_pincfg_dedicated_io_bank] = 0x101,
[arria10_pincfg_dedicated_io_1] = 0xb080a,
[arria10_pincfg_dedicated_io_2] = 0xb080a,
[arria10_pincfg_dedicated_io_3] = 0xb080a,
[arria10_pincfg_dedicated_io_4] = 0xa282a,
[arria10_pincfg_dedicated_io_5] = 0xa282a,
[arria10_pincfg_dedicated_io_6] = 0x8282a,
[arria10_pincfg_dedicated_io_7] = 0xa282a,
[arria10_pincfg_dedicated_io_8] = 0xa282a,
[arria10_pincfg_dedicated_io_9] = 0xa282a,
[arria10_pincfg_dedicated_io_10] = 0x90000,
[arria10_pincfg_dedicated_io_11] = 0x90000,
[arria10_pincfg_dedicated_io_12] = 0xa282a,
[arria10_pincfg_dedicated_io_13] = 0xa282a,
[arria10_pincfg_dedicated_io_14] = 0xa282a,
[arria10_pincfg_dedicated_io_15] = 0xa282a,
[arria10_pincfg_dedicated_io_16] = 0xa282a,
[arria10_pincfg_dedicated_io_17] = 0xa282a,
[arria10_pinmux_rgmii0_usefpga] = 0,
[arria10_pinmux_rgmii1_usefpga] = 0,
[arria10_pinmux_rgmii2_usefpga] = 0,
[arria10_pinmux_nand_usefpga] = 0,
[arria10_pinmux_qspi_usefpga] = 0,
[arria10_pinmux_sdmmc_usefpga] = 0,
[arria10_pinmux_spim0_usefpga] = 1,
[arria10_pinmux_spim1_usefpga] = 0,
[arria10_pinmux_spis0_usefpga] = 0,
[arria10_pinmux_spis1_usefpga] = 0,
[arria10_pinmux_uart0_usefpga] = 0,
[arria10_pinmux_uart1_usefpga] = 0,
[arria10_pinmux_i2c0_usefpga] = 0,
[arria10_pinmux_i2c1_usefpga] = 0,
[arria10_pinmux_i2cemac0_usefpga] = 0,
[arria10_pinmux_i2cemac1_usefpga] = 0,
[arria10_pinmux_i2cemac2_usefpga] = 0,
};

