/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __MACH_IMX8MN_REGS_H
#define __MACH_IMX8MN_REGS_H

#include <mach/imx/imx8m-regs.h>

#define MX8MN_GPIO1_BASE_ADDR		0x30200000
#define MX8MN_GPIO2_BASE_ADDR		0x30210000
#define MX8MN_GPIO3_BASE_ADDR		0x30220000
#define MX8MN_GPIO4_BASE_ADDR		0x30230000
#define MX8MN_GPIO5_BASE_ADDR		0x30240000
#define MX8MN_WDOG1_BASE_ADDR		0x30280000
#define MX8MN_WDOG2_BASE_ADDR		0x30290000
#define MX8MN_WDOG3_BASE_ADDR		0x302a0000
#define MX8MN_IOMUXC_BASE_ADDR		0x30330000
#define MX8MN_IOMUXC_GPR_BASE_ADDR	0x30340000
#define MX8MN_OCOTP_BASE_ADDR		0x30350000
#define MX8MN_ANATOP_BASE_ADDR		0x30360000
#define MX8MN_CCM_BASE_ADDR		0x30380000
#define MX8MN_SRC_BASE_ADDR		0x30390000

#define MX8MN_SYSCNT_RD_BASE_ADDR	0x306a0000


#define MX8MN_I2C1_BASE_ADDR		0x30a20000
#define MX8MN_I2C2_BASE_ADDR		0x30a30000
#define MX8MN_I2C3_BASE_ADDR		0x30a40000
#define MX8MN_I2C4_BASE_ADDR		0x30a50000
#define MX8MN_USDHC1_BASE_ADDR		0x30b40000
#define MX8MN_USDHC2_BASE_ADDR		0x30b50000

#define MX8MN_USB1_BASE_ADDR		0x32e40000

#endif /* __MACH_IMX8MN_REGS_H */
